LLVM/project 823eb1allvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY nodes. (#89133)

DeltaFile
+12-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+12-01 files

LLVM/project 26101e8flang/lib/Semantics check-cuda.cpp, flang/test/Semantics cuf11.cuf

[flang][cuda] Avoid crash by exiting the check if assignment is not usable (#89149)

In the presence of other semantic error, `GetAssignment` would return a
nullptr and therefore would make the rest of the check crash when trying
to collect symbols.

Exiting early when we have a nullptr so the compiler doesn't crash and
user can get the meaningful semantic error.
DeltaFile
+8-0flang/test/Semantics/cuf11.cuf
+4-0flang/lib/Semantics/check-cuda.cpp
+12-02 files

LLVM/project b207702compiler-rt/cmake/Modules CompilerRTUtils.cmake

Revert "CompilerRT: Normalize COMPILER_RT_DEFAULT_TARGET_TRIPLE (#88835)"

This reverts commit 16f188761da1df6ba5e6627b8742aacfec8e9ec5.
DeltaFile
+0-6compiler-rt/cmake/Modules/CompilerRTUtils.cmake
+0-61 files

LLVM/project 678f19fllvm/lib/Support/Unix Path.inc, llvm/test/tools/llvm-symbolizer input-file-err.test

[Support] Report EISDIR when opening a directory (#79880)

The test `llvm/unittests/Support/CommandLineTest.cpp` that handles
errors in expansion of response files was previously disabled for AIX.
Originally the code was dependent on `read` returning `EISDIR` which
occurs on platforms such as Linux. However, other platforms such as AIX
allow use of `read` on file descriptors for directories. This change
updates `readNativeFile` to produce `EISDIR` on AIX and z/OS when used
on a directory (instead of relying on the call to `read` to do so).

---------

Co-authored-by: Alison Zhang <alisonzhang at ibm.com>
Co-authored-by: James Henderson <46713263+jh7370 at users.noreply.github.com>
DeltaFile
+22-0llvm/unittests/Support/Path.cpp
+9-0llvm/lib/Support/Unix/Path.inc
+0-2llvm/test/tools/llvm-symbolizer/input-file-err.test
+0-2llvm/unittests/Support/CommandLineTest.cpp
+31-44 files

LLVM/project 0ab3f16llvm/test/CodeGen/RISCV rv64zba.ll

[RISCV] Add coverage of add (mul X, C), Y oppurtunity using shNadd
DeltaFile
+73-0llvm/test/CodeGen/RISCV/rv64zba.ll
+73-01 files

LLVM/project 1b87418utils/bazel/llvm-project-overlay/lldb BUILD.bazel, utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel

[bazel] Improve liblldb building (#89095)

On Linux using --version-script doesn't force loading of the underlying
archives that contain the symbols. By setting alwayslink=True on the API
cc_library we virtually get this behavior. This also allows downstream
users to use the exports files used by cmake. We could build more
configurability into this but there are also a lot of possible
variations users might want.
DeltaFile
+24-18utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+2-18utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+26-362 files

LLVM/project 7af09fbllvm/test/Analysis/CostModel/AArch64 shuffle-load.ll, llvm/test/CodeGen/AArch64 itofp.ll neon-dotreduce.ll

Fix formatting

Created using spr 1.3.5
DeltaFile
+818-818llvm/test/tools/llvm-mca/AArch64/Cortex/A510-sve-instructions.s
+566-566llvm/test/CodeGen/AArch64/itofp.ll
+392-392llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+620-0llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
+274-274llvm/test/CodeGen/AArch64/vecreduce-add.ll
+414-0llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
+3,084-2,050271 files not shown
+9,020-6,841277 files

LLVM/project 9435edfflang/lib/Lower Allocatable.cpp, flang/test/Lower/CUDA cuda-allocatable.cuf

[flang][cuda] Lower DEALLOCATE for device variables (#89091)

Replace the runtime call to `AllocatableDeallocate` for CUDA device
variable to the newly added `fir.cuda_deallocate` operation.

This is similar with #88980 

A third patch will handle the case of automatic dealloctaion of device
allocatable variables
DeltaFile
+30-3flang/lib/Lower/Allocatable.cpp
+15-0flang/test/Lower/CUDA/cuda-allocatable.cuf
+45-32 files

LLVM/project 0cee894flang/runtime extensions.cpp

[flang][NFC] Add missing include for FreeBSD

Suggested by dankm here: https://github.com/llvm/llvm-project/pull/88517
DeltaFile
+3-3flang/runtime/extensions.cpp
+3-31 files

LLVM/project f309c88flang/runtime extensions.cpp

Revert "[flang][NFC] Add missing include for FreeBSD"

This reverts commit 2583b2eea4a509424e5e5f51dffedd9beede76a3.
DeltaFile
+0-1flang/runtime/extensions.cpp
+0-11 files

LLVM/project e15f47fllvm/include/llvm/Analysis SimplifyQuery.h, llvm/lib/Transforms/InstCombine InstCombineAddSub.cpp

[InstCombine] Don't use dominating conditions to transform sub into xor. (#88566)

Other passes are unable to reverse this transform if we use dominating
conditions.
    
Fixes #88239.
DeltaFile
+6-7llvm/test/Transforms/PhaseOrdering/X86/pr88239.ll
+6-0llvm/include/llvm/Analysis/SimplifyQuery.h
+4-2llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+3-1llvm/test/Transforms/InstCombine/sub-xor.ll
+19-104 files

LLVM/project 60b90b5lldb/source/Plugins/DynamicLoader/POSIX-DYLD DynamicLoaderPOSIXDYLD.cpp, lldb/test/API/functionalities/breakpoint/breakpoint_command TestBreakpointCommand.py

[lldb][DynamicLoader] Fix lldb unable to stop at _dl_debug_state if user set it before the process launched. (#88792)

If user sets a breakpoint at `_dl_debug_state` before the process
launched, the breakpoint is not resolved yet. When lldb loads dynamic
loader module, it's created with `Target::GetOrCreateModule` which
notifies any pending breakpoint to resolve. However, the module's
sections are not loaded at this time. They are loaded after returned
from
[Target::GetOrCreateModule](https://github.com/llvm/llvm-project/blob/0287a5cc4e2a5ded1ae2e4079f91052e6a6b8d9b/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp#L574-L577).
This change fixes it by manually resolving breakpoints after creating
dynamic loader module.
DeltaFile
+17-0lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
+9-2lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
+26-22 files

LLVM/project d0c51f7llvm/include/llvm/CodeGen LivePhysRegs.h MachineBasicBlock.h, llvm/lib/CodeGen MachineBasicBlock.cpp

[LiveIns] Improve recomputeLiveIns() (#88951)

Some small changes to recomputeLiveIns() to improve performance:

- Instead of copying the list of old live-ins, and then clearing
  them, a new method swaps the list for an empty one.
- getLiveIns() now returns a constant reference to the list

As result, the list-data is never copied. Depending on the
implementation
details of the vector container, it can also save calls to allocate
and deallocate memory.
I see a small improvement on CTMark with these changes.

---------

Co-authored-by: Nikita Popov <github at npopov.com>
DeltaFile
+5-4llvm/include/llvm/CodeGen/LivePhysRegs.h
+5-1llvm/include/llvm/CodeGen/MachineBasicBlock.h
+6-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+16-53 files

LLVM/project 2583b2eflang/runtime extensions.cpp

[flang][NFC] Add missing include for FreeBSD

Suggested by dankm here: https://github.com/llvm/llvm-project/pull/88517
DeltaFile
+1-0flang/runtime/extensions.cpp
+1-01 files

LLVM/project 652bcf6llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen CodeGenPrepare.cpp

CodeGenPrepare: Add support for llvm.threadlocal.address address-mode sinking (#87844)

Depending on the TLSMode many thread-local accesses on x86 can be
expressed by adding a %fs: segment register to an addressing mode. Even
if there are mutliple users of a `llvm.threadlocal.address` intrinsic it
is generally not worth sharing the value in a register but instead fold
the %fs access into multiple addressing modes.

Hence this changes CodeGenPrepare to duplicate the
`llvm.threadlocal.address` intrinsic as necessary.

Introduces a new `TargetLowering::addressingModeSupportsTLS` callback
that allows targets to indicate whether TLS accesses can be part of an
addressing mode.

This is fixing a performance problem, as this folding of TLS-accesses
into multiple addressing modes happened naturally before the
introduction of the `llvm.threadlocal.address` intrinsic, but regressed
due to `SelectionDAG` keeping things in registers when accessed across

    [3 lines not shown]
DeltaFile
+193-0llvm/test/CodeGen/X86/codegen-prepare-addrmode-tls.ll
+86-0llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-tls.ll
+25-4llvm/lib/CodeGen/CodeGenPrepare.cpp
+24-0llvm/lib/Target/X86/X86ISelLowering.cpp
+6-0llvm/include/llvm/CodeGen/TargetLowering.h
+2-0llvm/lib/Target/X86/X86ISelLowering.h
+336-46 files

LLVM/project 00d7fe5llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 multiple_reduction.ll loadorder.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+642-84llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+180-204llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
+177-201llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
+177-201llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
+147-151llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
+108-123llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
+1,431-96447 files not shown
+2,122-1,84053 files

LLVM/project db2f64ellvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-rmw-fadd.ll

AMDGPU: Fix not handling atomicrmw fadd in exotic address spaces correctly

We try to interpret unknown address space numbers as aliases of global,
but this wasn't applied here. Also improve test coverage for the
buffer fat pointer address space.
DeltaFile
+414-0llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+415-12 files

LLVM/project 1460b49llvm/utils/gn/secondary/libcxx/include BUILD.gn

[gn build] Manually port d423d80e560d
DeltaFile
+8-9llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+8-91 files

LLVM/project 6cea7c4llvm/lib/Target/X86 X86ISelDAGToDAG.cpp, llvm/test/CodeGen/X86 code-model-elf.ll

[X86] Always use 64-bit relocations in no-PIC large code model (#89101)

This matches other types of relocations, e.g. to constant pool. And
makes things more consistent with PIC large code model.

Some users of the large code model may not place small data in the lower
2GB of the address space (e.g.
https://github.com/ClangBuiltLinux/linux/issues/2016), so just
unconditionally use 64-bit relocations in the large code model.

So now functions in a section not marked large will use 64-bit
relocations to reference everything when using the large code model.

This also fixes some lldb tests broken by #88172
(https://lab.llvm.org/buildbot/#/builders/68/builds/72458).
DeltaFile
+3-4llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+2-2llvm/test/CodeGen/X86/code-model-elf.ll
+5-62 files

LLVM/project 0e19554clang/include/clang/CIR/Dialect/IR CIRDialect.h, clang/lib/CIR/Dialect/IR CIRDialect.cpp

include dialect and add include guards

Created using spr 1.3.5
DeltaFile
+5-0clang/include/clang/CIR/Dialect/IR/CIRDialect.h
+2-0clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+7-02 files

LLVM/project b1dc62fclang/lib/Parse ParseExprCXX.cpp, clang/test/Sema static-assert.c

[clang]Treat arguments to builtin type traits as template type arguments (#87132)

This change improves error messages for builtins in case of empty
parentheses.

Fixes llvm#86997
DeltaFile
+6-6clang/lib/Parse/ParseExprCXX.cpp
+4-5clang/test/Sema/static-assert.c
+5-0clang/test/SemaCXX/deprecated-builtins.cpp
+5-0clang/test/SemaCXX/builtins.cpp
+20-114 files

LLVM/project 40cf6d9libcxx/include/__chrono local_info.h ostream.h, libcxx/test/libcxx/time/time.zone/time.zone.info/time.zone.info.local ostream.pass.cpp

[libc++][TZDB] Adds local_info formatter.

Note the code using a local_info object will be done in a separate
commit.

Implements parts of:
- P0355 Extending to Calendars and Time Zones
- P1361 Integration of chrono with text formatting
DeltaFile
+126-0libcxx/test/std/time/time.syn/formatter.local_info.pass.cpp
+114-0libcxx/test/libcxx/time/time.zone/time.zone.info/time.zone.info.local/ostream.pass.cpp
+57-0libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.local/local_info,members.pass.cpp
+53-0libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.local/ostream.pass.cpp
+50-0libcxx/include/__chrono/local_info.h
+22-0libcxx/include/__chrono/ostream.h
+422-09 files not shown
+467-215 files

LLVM/project 6f7976clibcxx/include/__chrono formatter.h ostream.h, libcxx/test/libcxx/time/time.zone/time.zone.info/time.zone.info.sys ostream.pass.cpp

[libc++][TZDB] Adds sys_info formatter. (#85896)

Implements parts of:
- P0355 Extending <chrono> to Calendars and Time Zones
- P1361 Integration of chrono with text formatting
DeltaFile
+137-0libcxx/test/std/time/time.syn/formatter.sys_info.pass.cpp
+74-0libcxx/test/libcxx/time/time.zone/time.zone.info/time.zone.info.sys/ostream.pass.cpp
+52-0libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.sys/ostream.pass.cpp
+41-4libcxx/include/__chrono/formatter.h
+20-0libcxx/include/__chrono/ostream.h
+8-0libcxx/test/support/test_macros.h
+332-45 files not shown
+347-711 files

LLVM/project 800f105.github new-prs-labeler.yml

[GitHub] Add a new mapping for `offload` subproject (#89118)

Fix #89071.
DeltaFile
+3-0.github/new-prs-labeler.yml
+3-01 files

LLVM/project 5a0942cllvm/lib/Target/NVPTX NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX i8x4-instructions.ll dynamic_stackalloc.ll

[llvm][NVPTX] Don't emit unused var 'temp_param_reg' (NFC) (#89004)

Don't emit unused variable 'temp_param_reg' which has been around since
ae556d3ef72dfe5f40a337b7071f42b7bf5b66a4 .
DeltaFile
+1-2llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+0-3llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
+0-2llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
+0-1llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
+0-1llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
+1-95 files

LLVM/project 4572a2dllvm/test/Analysis/CostModel/AArch64 shuffle-load.ll

[AArch64] Add some test cases for LD2/LD3/LD4 shuffles. NFC
DeltaFile
+620-0llvm/test/Analysis/CostModel/AArch64/shuffle-load.ll
+620-01 files

LLVM/project 5f2c198clang/test/Preprocessor riscv-target-features.c, llvm/docs RISCVUsage.rst

Revert "[RISCV] Support Zama16b1p0 (#88474)"

This reverts commit b090569685699abe4a8031ad442a0f81e373146b.
DeltaFile
+0-7clang/test/Preprocessor/riscv-target-features.c
+0-7llvm/lib/Target/RISCV/RISCVFeatures.td
+0-4llvm/test/CodeGen/RISCV/attributes.ll
+1-2llvm/docs/RISCVUsage.rst
+0-3llvm/test/MC/RISCV/attribute-arch.s
+0-1llvm/lib/Support/RISCVISAInfo.cpp
+1-241 files not shown
+1-257 files

LLVM/project cc82f12llvm/test/CodeGen/AArch64 itofp.ll neon-dotreduce.ll, llvm/test/tools/llvm-mca/AArch64/Cortex A510-sve-instructions.s A510-neon-instructions.s

[AArch64] Update latencies for Cortex-A510 scheduling model (#87293)

Updated according to the Software Optimization Guide for Arm®
Cortex®‑A510 Core Revision: r1p3 Issue 6.0.
DeltaFile
+818-818llvm/test/tools/llvm-mca/AArch64/Cortex/A510-sve-instructions.s
+566-566llvm/test/CodeGen/AArch64/itofp.ll
+392-392llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+274-274llvm/test/CodeGen/AArch64/vecreduce-add.ll
+188-188llvm/test/tools/llvm-mca/AArch64/Cortex/A510-neon-instructions.s
+185-185llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
+2,423-2,423203 files not shown
+6,527-6,520209 files

LLVM/project 58a08e1llvm/test/CodeGen/RISCV rv32zba.ll rv64zba.ll

[RISCV] Add coverage for strength reduction of mul by small negative immediates
DeltaFile
+93-0llvm/test/CodeGen/RISCV/rv32zba.ll
+93-0llvm/test/CodeGen/RISCV/rv64zba.ll
+186-02 files

LLVM/project c02ed29llvm/lib/Target/X86 X86TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/X86 fshr-codesize.ll fshr-sizelatency.ll

[CostModel][X86] Recognise vector rotation by uniform constant patterns

Adds suitable costs for AVX512 targets (we still rely on default expansion for AVX2 and earlier)
DeltaFile
+24-24llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
+24-24llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
+34-7llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+26-14llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
+26-14llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
+12-12llvm/test/Analysis/CostModel/X86/fshr-latency.ll
+146-955 files not shown
+204-15311 files