clocksource/drivers/riscv: Fix clocksource mask
For all riscv architectures (RV32, RV64 and RV128), the clocksource
is a 64 bit incrementing counter.
Fix the clock source mask accordingly.
Tested on both 64bit and 32 bit virt machine in QEMU.
Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")
Signed-off-by: Atish Patra <atish.patra at wdc.com>
Signed-off-by: Thomas Gleixner <tglx at linutronix.de>
Reviewed-by: Anup Patel <anup at brainfault.org>
Cc: Albert Ou <aou at eecs.berkeley.edu>
Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Cc: linux-riscv at lists.infradead.org
Cc: Palmer Dabbelt <palmer at sifive.com>
Cc: Anup Patel <Anup.Patel at wdc.com>
Cc: Damien Le Moal <Damien.LeMoal at wdc.com>
Cc: stable at vger.kernel.org
Link: https://lkml.kernel.org/r/20190322215411.19362-1-atish.patra@wdc.com
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