LLVM/project 3eeed35llvm/include/llvm/ADT APInt.h, llvm/lib/Support APInt.cpp

[ADT] Mark deprecated APInt constructor deleted (#216371)

Mark deprecated APInt constructor, taking uint64_t[] deleted instead of
removing it as the comment suggests.
DeltaFile
+5-9llvm/include/llvm/ADT/APInt.h
+0-5llvm/lib/Support/APInt.cpp
+5-142 files

FreeBSD/ports 1bc6e53databases/py-harlequin distinfo Makefile

databases/py-harlequin: Update to 2.9.0

- Update list of run dependencies

ChangeLog:      https://github.com/tconbeer/harlequin/releases/tag/v2.9.0
Reported by:    Ted Conbeer <notifications at github.com>
DeltaFile
+3-3databases/py-harlequin/distinfo
+4-2databases/py-harlequin/Makefile
+7-52 files

FreeBSD/ports 914c13fcomms/meshcore-cli Makefile distinfo

comms/meshcore-cli: upgrade to 1.6.0
DeltaFile
+3-3comms/meshcore-cli/distinfo
+1-1comms/meshcore-cli/Makefile
+4-42 files

FreeBSD/ports 0a9ac89textproc/py-urlscan distinfo Makefile

textproc/py-urlscan: Update to 1.1.0

- Update list of build dependencies

ChangeLog:      https://github.com/firecat53/urlscan/releases/tag/1.1.0
Reported by:    "github-actions[bot]" <notifications at github.com>
DeltaFile
+3-4textproc/py-urlscan/Makefile
+3-3textproc/py-urlscan/distinfo
+6-72 files

LLVM/project bbff70cllvm/test/CodeGen/NVPTX tcgen05-mma-collector-b.ll tcgen05-mma-sp-disable-output-lane-collector-b.ll

[NVPTX] Add tcgen05.mma kind::ti16 for sm_107f + mxf4{nvf4} for sm_107a (#215624)

Extend NVPTX `tcgen05.mma*` with `kind::ti16` for `sm_107f`.
DeltaFile
+692-0llvm/test/CodeGen/NVPTX/tcgen05-mma-ti16-kind.ll
+572-0llvm/test/CodeGen/NVPTX/tcgen05-mma-sp-mxf4-mxf4nvf4-kind.ll
+309-0llvm/test/CodeGen/NVPTX/tcgen05-mma-sp-collector-b.ll
+217-0llvm/test/CodeGen/NVPTX/tcgen05-mma-disable-output-lane-collector-b.ll
+212-0llvm/test/CodeGen/NVPTX/tcgen05-mma-sp-disable-output-lane-collector-b.ll
+151-0llvm/test/CodeGen/NVPTX/tcgen05-mma-collector-b.ll
+2,153-011 files not shown
+2,320-11017 files

NetBSD/pkgsrc sTtcpbCdoc CHANGES-2026

   doc: Updated net/inetutils to 2.8nb1
VersionDeltaFile
1.5293+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc JjTMmMInet/inetutils Makefile distinfo, net/inetutils/patches patch-talkd_talkd.c patch-talkd_intalkd.h

   inetutils: fix CVE-2026-19720 using upstream patch.

   Bump PKGREVISION.
VersionDeltaFile
1.1+223-0net/inetutils/patches/patch-talkd_announce.c
1.1+24-0net/inetutils/patches/patch-talkd_intalkd.h
1.1+23-0net/inetutils/patches/patch-talkd_talkd.c
1.10+4-1net/inetutils/distinfo
1.14+2-1net/inetutils/Makefile
+276-25 files

FreeBSD/doc a4db7abwebsite/content/en/releases/14.5R schedule.adoc

14.5: On schedule

The 14.5-BETA2 builds started on August 14, 2026.

Approved by:    re (implicit)
Sponsored by:   OpenSats Initiative
DeltaFile
+1-1website/content/en/releases/14.5R/schedule.adoc
+1-11 files

LLVM/project 585178dllvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 intrinsic-vector-match-sve2.ll

[AArch64] Remove search size limit in VECTOR_MATCH lowering (#215786)

Any legal (64/128-bits) needle vector can be lowered to `match`.
DeltaFile
+29-0llvm/test/CodeGen/AArch64/intrinsic-vector-match-sve2.ll
+0-8llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+29-82 files

FreeBSD/src fa0dc4fcontrib/less search.c command.c

MFV: less v704.

MFC after:      3 days
DeltaFile
+245-91contrib/less/decode.c
+213-114contrib/less/less.nro
+147-59contrib/less/regexp.c
+173-29contrib/less/optfunc.c
+132-54contrib/less/command.c
+83-55contrib/less/search.c
+993-40238 files not shown
+1,844-76344 files

FreeBSD/src 156348a. command.c optfunc.c

Vendor import of less v704.
DeltaFile
+731-644less.man
+245-91decode.c
+213-114less.nro
+147-59regexp.c
+173-29optfunc.c
+132-54command.c
+1,641-99146 files not shown
+2,688-1,42852 files

LLVM/project 23e0cbelldb/source/Expression DWARFExpression.cpp, lldb/unittests/Expression DWARFExpressionTest.cpp

[LLDB] fix lldb breg adress width (#216291)

`DW_OP_breg0..31` and `DW_OP_bregx` preserved the scalar width supplied
by the register backend and added their displacement as a `uint64_t`. On
32-bit targets this could leave a 64-bit value on the expression stack,
so later generic address arithmetic did not wrap at the target address
size.

Perform the register-plus-offset calculation using the evaluator's
address-sized generic representation. This keeps `DW_OP_breg*` results
at the target address width without changing shared register reading or
the generic
operand compatibility rule.

Add unit tests for both compact and extended breg opcodes. They cover a
32-bit register value, a backend-provided 64-bit register value on i386,
a negative displacement, and modulo-32-bit overflow.

Fixes #209728
DeltaFile
+31-0lldb/unittests/Expression/DWARFExpressionTest.cpp
+4-2lldb/source/Expression/DWARFExpression.cpp
+35-22 files

LLVM/project d0bc528llvm/tools/llvm-nm llvm-nm.cpp

Address review comments on the parameter.
DeltaFile
+2-3llvm/tools/llvm-nm/llvm-nm.cpp
+2-31 files

Linux/linux 15ef2f7drivers/input/touchscreen sur40.c

Merge tag 'input-for-v7.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input

Pull input fixes from Dmitry Torokhov:

 - A couple of fixes to the sur40 touchscreen driver to correct
   registration and teardown ordering, and to fix error path
   unwinding when video device registration fails.

* tag 'input-for-v7.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: sur40 - fix V4L error path cleanup
  Input: sur40 - fix input device registration ordering
DeltaFile
+13-10drivers/input/touchscreen/sur40.c
+13-101 files

LLVM/project 04956d9llvm/include/llvm/Analysis DXILResource.h, llvm/include/llvm/IR IntrinsicsDirectX.td

[DirectX] Add support for heap resources to `DXILResourceMap`.

- `DXILResourceMap` now handles a new `llvm.dx.resource.handlefromheap` intrisics
  and adds the heap resources to the resource map.

- A new member `HeapResourceID` has been added to `ResourceInfo` to distinguish
  between heap resource instances created from different indices. The `HeapResourceID`
  is unique for each heap index `Value*`, so multiple handle creation calls using
  the same index `Value*` resolve to the same resource.

- Heap resources do not have register bindings, so the `Binding` member
  on `ResourceInfo` is now optional.

- All places that were always expecting binding are updated to handle
  heap resources. In most cases that means skipping them, such as when
  generating DXIL resource metadata, creating PSV resource entries or
  pretty-printing the resource table comment for the module disassembly
  output.


    [2 lines not shown]
DeltaFile
+174-0llvm/test/Analysis/DXILResource/buffer-fromheap.ll
+50-14llvm/lib/Analysis/DXILResource.cpp
+24-7llvm/include/llvm/Analysis/DXILResource.h
+9-5llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
+12-0llvm/test/CodeGen/DirectX/resource_from_heap_counter_error.ll
+10-0llvm/include/llvm/IR/IntrinsicsDirectX.td
+279-262 files not shown
+289-268 files

LLVM/project 22eba47lld/ELF SyntheticSections.cpp, lld/test/ELF eh-frame-hdr-oscillation.s

[ELF] Prevent .eh_frame_hdr size oscillation in address assignment (#216248)

When .eh_frame_hdr size shifts, section addresses can change whether
FDEs evaluate to identical PC-relative offsets, causing FDE
deduplication count to toggle and section size to oscillate infinitely
between passes.

Prevent .eh_frame_hdr from shrinking during iterative address assignment
passes (matching .relr.dyn) to ensure monotonic convergence.
DeltaFile
+51-0lld/test/ELF/eh-frame-hdr-oscillation.s
+6-0lld/ELF/SyntheticSections.cpp
+57-02 files

LLVM/project 05ed268llvm/include/llvm/Analysis DXILResource.h, llvm/lib/Analysis DXILResource.cpp

[NFC][DirectX] Rename ResourceInfo::RecordID to BindingID (#216376)

Rename `ResourceInfo::RecordID` to `BindingID` to better reflect its
purpose. This field is set only for resources with an associated
binding. This also clarifies the distinction from the upcoming
`HeapResourceID` member, which will identify resources originating from
a heap. The existing `RecordID` name could be ambiguous once both
identifiers are present.

The change also removes the `RecordID` argument from the `ResourceIfo`
constructor because it has always been called with `0` value. The
`BindingID` is set later via `setBindingID` after all resource instances
are collected.
DeltaFile
+32-34llvm/unittests/Analysis/DXILResourceTest.cpp
+10-10llvm/test/Analysis/DXILResource/buffer-frombinding.ll
+10-10llvm/include/llvm/Analysis/DXILResource.h
+4-5llvm/lib/Analysis/DXILResource.cpp
+3-3llvm/test/Analysis/DXILResource/has-atomic64-use.ll
+2-2llvm/test/Analysis/DXILResource/buffer-frombinding-unbounded.ll
+61-642 files not shown
+63-668 files

LLVM/project 25e6e73llvm/lib/Target/AMDGPU SIInstrInfo.td, llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp

[AMDGPU][MC] Fix a crash when invalid SDWA encoding is used

Fixes #215006.
DeltaFile
+16-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+14-0llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
+4-1llvm/lib/Target/AMDGPU/SIInstrInfo.td
+34-13 files

LLVM/project 0cd9f45llvm/lib/Target/AMDGPU SIInstrInfo.td, llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp

[AMDGPU][MC] Fix a crash when invalid SDWA encoding is used

Fixes #215006.
DeltaFile
+16-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+14-0llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
+4-1llvm/lib/Target/AMDGPU/SIInstrInfo.td
+34-13 files

FreeBSD/ports a4abb3ex11/waveterm Makefile

x11/waveterm: Bump port revision after electron41 update (f1d3c7cb5265)
DeltaFile
+1-1x11/waveterm/Makefile
+1-11 files

HardenedBSD/ports a4abb3ex11/waveterm Makefile

x11/waveterm: Bump port revision after electron41 update (f1d3c7cb5265)
DeltaFile
+1-1x11/waveterm/Makefile
+1-11 files

HardenedBSD/ports 0b23ce8Mk/Uses npm.mk

Mk/Uses/npm.mk: Add new variable NPM_PREFETCH_ARCHS

A node modules archive created by the prefetch function may vary
depending on the architecture, especially if the archive contains
architecture-specific node modules.

This variable can be used to indicate which architectures the node
modules archives are prepared for.

If you prepared the archives for amd64 and aarch64 architecutres,
specify:
NPM_PREFETCH_ARCHS= aarch64 amd64
DeltaFile
+27-2Mk/Uses/npm.mk
+27-21 files

FreeBSD/ports 0b23ce8Mk/Uses npm.mk

Mk/Uses/npm.mk: Add new variable NPM_PREFETCH_ARCHS

A node modules archive created by the prefetch function may vary
depending on the architecture, especially if the archive contains
architecture-specific node modules.

This variable can be used to indicate which architectures the node
modules archives are prepared for.

If you prepared the archives for amd64 and aarch64 architecutres,
specify:
NPM_PREFETCH_ARCHS= aarch64 amd64
DeltaFile
+27-2Mk/Uses/npm.mk
+27-21 files

HardenedBSD/ports f1d3c7cdevel/electron41 distinfo, devel/electron41/files patch-ui_base_x_x11__shm__image__pool.cc patch-ui_base_cursor_cursor__factory.h

devel/electron41: Update to 41.10.5

While here, prepare node modules archives for amd64 and aarch64
separately.

Changelog: https://github.com/electron/electron/releases/tag/v41.10.5

Reported by:    GitHub (watch releases)
DeltaFile
+7-5devel/electron41/distinfo
+11-0devel/electron41/files/patch-ui_base_cursor_cursor__unittest.cc
+5-5devel/electron41/files/patch-ui_base_x_x11__cursor__loader.cc
+4-4devel/electron41/files/patch-ui_base_cursor_cursor__factory.cc
+3-3devel/electron41/files/patch-ui_base_x_x11__shm__image__pool.cc
+3-3devel/electron41/files/patch-ui_base_cursor_cursor__factory.h
+33-204 files not shown
+39-2510 files

FreeBSD/ports f1d3c7cdevel/electron41 distinfo, devel/electron41/files patch-ui_base_x_x11__shm__image__pool.cc patch-ui_base_cursor_cursor__factory.h

devel/electron41: Update to 41.10.5

While here, prepare node modules archives for amd64 and aarch64
separately.

Changelog: https://github.com/electron/electron/releases/tag/v41.10.5

Reported by:    GitHub (watch releases)
DeltaFile
+7-5devel/electron41/distinfo
+11-0devel/electron41/files/patch-ui_base_cursor_cursor__unittest.cc
+5-5devel/electron41/files/patch-ui_base_x_x11__cursor__loader.cc
+4-4devel/electron41/files/patch-ui_base_cursor_cursor__factory.cc
+3-3devel/electron41/files/patch-ui_base_x_x11__shm__image__pool.cc
+3-3devel/electron41/files/patch-ui_base_cursor_cursor__factory.h
+33-204 files not shown
+39-2510 files

HardenedBSD/ports 3bf38f6sysutils/bhyvemgr pkg-plist Makefile

sysutils/bhyvemgr: Update to 2.0.4

ChangeLog at:   https://github.com/alonsobsd/bhyvemgr/compare/v2.0.3...v2.0.4
DeltaFile
+3-3sysutils/bhyvemgr/distinfo
+1-1sysutils/bhyvemgr/Makefile
+1-0sysutils/bhyvemgr/pkg-plist
+5-43 files

FreeBSD/ports bde7a8asysutils/bhyvemgrd Makefile distinfo

sysutils/bhyvemgrd: Update to 1.1.0

ChangeLog at:   https://github.com/alonsobsd/bhyvemgrd/compare/v1.0.2...v1.1.0
DeltaFile
+3-3sysutils/bhyvemgrd/distinfo
+1-1sysutils/bhyvemgrd/Makefile
+4-42 files

HardenedBSD/ports bde7a8asysutils/bhyvemgrd Makefile distinfo

sysutils/bhyvemgrd: Update to 1.1.0

ChangeLog at:   https://github.com/alonsobsd/bhyvemgrd/compare/v1.0.2...v1.1.0
DeltaFile
+3-3sysutils/bhyvemgrd/distinfo
+1-1sysutils/bhyvemgrd/Makefile
+4-42 files

FreeBSD/ports 3bf38f6sysutils/bhyvemgr pkg-plist Makefile

sysutils/bhyvemgr: Update to 2.0.4

ChangeLog at:   https://github.com/alonsobsd/bhyvemgr/compare/v2.0.3...v2.0.4
DeltaFile
+3-3sysutils/bhyvemgr/distinfo
+1-1sysutils/bhyvemgr/Makefile
+1-0sysutils/bhyvemgr/pkg-plist
+5-43 files

FreeBSD/ports f08e2eblang/python-doc-html distinfo, lang/python310 Makefile.version Makefile

lang/python310: update to 3.10.21

Changelog: https://docs.python.org/release/3.10.21/whatsnew/changelog.html
(cherry picked from commit 02c9d12d3cf366e1493556247bffa040c6fbce67)
DeltaFile
+3-11lang/python310/distinfo
+5-5lang/python-doc-html/distinfo
+0-5lang/python310/Makefile
+1-1lang/python310/Makefile.version
+9-224 files