LLVM/project 84778f4 — llvm/lib/ProfileData SampleProfReader.cpp, llvm/test/Transforms/SampleProfile vtable-prof-fs-discriminator.ll

[SampleProf] Accumulate vtable type counts for FS-discriminator-collapsed locations (#230380)

When reading a profile generated from flow-sensitive binaries,
accumulate vtable profiles for the same masked locations.

This is similar to how LBR samples are merged:
1) Body samples and call targets are merged at
https://github.com/llvm/llvm-project/blob/47c2af945d58584e450a624098609599237d166e/llvm/lib/ProfileData/SampleProfReader.cpp#L779-L795
2) Inlined callsite samples are merged at
https://github.com/llvm/llvm-project/blob/47c2af945d58584e450a624098609599237d166e/llvm/lib/ProfileData/SampleProfReader.cpp#L906-L913

Assisted-by: Claude

---------

Co-authored-by: Kazu Hirata <kazu at google.com>
DeltaFile
+79-0llvm/test/Transforms/SampleProfile/vtable-prof-fs-discriminator.ll
+19-5llvm/lib/ProfileData/SampleProfReader.cpp
+12-0llvm/test/Transforms/SampleProfile/Inputs/vtable-prof-fs-discriminator.prof
+110-53 files

LLVM/project 8dc2487 — llvm/include/llvm/CAS UnifiedOnDiskCache.h, llvm/lib/CAS UnifiedOnDiskCache.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+75-51llvm/lib/CAS/UnifiedOnDiskCache.cpp
+45-12llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
+10-10llvm/test/tools/llvm-cas/validation.test
+9-4llvm/include/llvm/CAS/UnifiedOnDiskCache.h
+5-5llvm/test/tools/llvm-cas/plugin-validation-crash.test
+4-2llvm/unittests/CAS/CASPluginTest/CASPluginTest.cpp
+148-844 files not shown
+156-9110 files

LLVM/project b6c0df4 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU fptrunc.f16.ll clmul.ll

Merge branch 'main' into users/chinmaydd/amdgpu-cvt-pk-test-cleanup
DeltaFile
+32,404-15,457llvm/test/CodeGen/AMDGPU/frem.ll
+23,347-23,371llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+5,274-5,643llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+5,761-3,731llvm/test/CodeGen/AMDGPU/srem.ll
+6,118-2,908llvm/test/CodeGen/AMDGPU/clmul.ll
+2,827-5,340llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
+75,731-56,4506,144 files not shown
+472,683-235,7246,150 files

LLVM/project 3dbdd2e — clang/test/CodeGenOpenCL builtins-amdgcn-gfx1250.cl builtins-amdgcn-gfx1250-only.cl, llvm/test/CodeGen/AMDGPU llvm.amdgcn.s.barrier.ll s-cluster-barrier.ll

[AMDGPU] Refactor builtin tests for gfx1310 runs. NFC (#231284)

Move builtins gfx1310 lacks from builtins-amdgcn-gfx1250.cl to
builtins-amdgcn-gfx1250-only.cl so the remainder can also run on
gfx1310. Moved checks are unchanged.

Add gfx1250 and gfx1310 runs to builtins-amdgcn-gfx12.cl and gfx1310
runs to the barrier llc tests.

Assisted by: Claude
DeltaFile
+300-0llvm/test/CodeGen/AMDGPU/s-barrier.ll
+212-0clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-only.cl
+1-204clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
+94-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
+35-0llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll
+32-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
+674-2042 files not shown
+697-2048 files

LLVM/project cf80fc3 — llvm/test/Transforms/SLPVectorizer/AMDGPU ordered-reduction-coalesced-loads.ll fmul-extract-fadd-chain.ll

update tests
DeltaFile
+0-88llvm/test/Transforms/SLPVectorizer/AMDGPU/fmul-extract-fadd-chain.ll
+16-64llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-coalesced-loads.ll
+16-1522 files

LLVM/project 5f1edcd — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Transforms/SLPVectorizer/AMDGPU alt-fmul-fadd-cost.ll fma-operand-contract-selection.ll

[AMDGPU] Limit the fmul fusion discount to a matching context type

The fmul is free when its context instruction feeds a fusable fadd or
fsub. A vector fmul priced with a scalar lane as the context inherits
that fusion only when it is emitted lane by lane. On a packed type the
scalar user does not show that the vector fmul feeds a vector fadd, and
products extracted into a scalar fadd chain keep the packed fmul while
the fma is lost.
DeltaFile
+88-0llvm/test/Transforms/SLPVectorizer/AMDGPU/fmul-extract-fadd-chain.ll
+64-16llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-coalesced-loads.ll
+38-37llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-fma-fusion.ll
+36-6llvm/test/Transforms/SLPVectorizer/AMDGPU/fma-operand-contract-selection.ll
+7-11llvm/test/Transforms/SLPVectorizer/AMDGPU/alt-fmul-fadd-cost.ll
+5-2llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+238-721 files not shown
+239-737 files

FreeBSD/src cdd9503 — sys/net iflib.c

iflib: unify prefetching

This change makes all prefetching use the iflib prefetch wrappers, rather
than using prefetch() in some places and __builtin_prefetch() in others.

Note that __builtin_prefetch() does not work in the kernel on amd64 as clang
disables it when -mnosse is specified, so we must use the asm directives there,
and builtin_prefetch() elsewhere.

This change enables prefetching on non-x86 (notably arm64), and it enables
prefetching in netmap that has been there since day one, but which has never worked.

This is a no-op on non-netmap amd64 and i386

Differential Revision: https://reviews.freebsd.org/D60602
Reviewed by: glebius, kbowling
Sponsored by: Netflix
DeltaFile
+25-33sys/net/iflib.c
+25-331 files

LLVM/project 42f87c5 — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

fixup! [CIR] Implement ViewLikeOpInterface for multiple Ops
DeltaFile
+34-0clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
+21-8clang/include/clang/CIR/Dialect/IR/CIROps.td
+17-3clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+72-113 files

LLVM/project db4132b — llvm/lib/Transforms/AggressiveInstCombine AggressiveInstCombine.cpp, llvm/test/Transforms/AggressiveInstCombine/RISCV lower-table-based-ctpop.ll

[AggressiveInstCombine] Match ctpop table lookups (#231225)

perlbench, gcc and ffmpeg all contain this pattern of ctpop table
lookups:

```c
int ctpop(unsigned char x) {
    static const char table[256] = {0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6, 7, 7, 8,};
    return table[x];
}
```

This teaches AggressiveInstCombine to detect them and lower them to a
llvm.ctpop intrinsic if the target reports ctpop is fast.

We need to also teach replaceWithPopCount to handle extending the result
as the loaded result may be wider than the index used as the input.

Note that this will also match on tiny tables e.g. a load of i8 from [2

    [8 lines not shown]
DeltaFile
+81-0llvm/test/Transforms/AggressiveInstCombine/RISCV/lower-table-based-ctpop.ll
+42-12llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+123-122 files

LLVM/project 8447ff0 — llvm/lib/Target/AMDGPU AMDGPU.td DSInstructions.td, llvm/test/CodeGen/AMDGPU atomic-load-store-16-sramecc.ll

AMDGPU: Only use 16-bit atomic loads when D16 preserves unused bits

Make the atomic load/store legality match the hardware operand
structure. A 16-bit atomic load only produces a real 16-bit result
with the true16 D16 loads, which require d16PreservesUnusedBits. With
SRAMECC enabled the true16 patterns use a 32-bit load and extract the
low half, so promote i16, f16 and bf16 atomic loads to an i32 extending
load instead. Atomic stores remain 16-bit with real true16, since the
store source is a 16-bit register regardless.

Remove the true16 sramecc atomic load patterns which are now dead.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+164-0llvm/test/CodeGen/AMDGPU/atomic-load-store-16-sramecc.ll
+12-7llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+0-11llvm/lib/Target/AMDGPU/FLATInstructions.td
+9-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+3-3llvm/lib/Target/AMDGPU/DSInstructions.td
+4-0llvm/lib/Target/AMDGPU/AMDGPU.td
+192-231 files not shown
+193-247 files

LLVM/project 6b4670d — llvm/include/llvm/TableGen Record.h, llvm/lib/TableGen Record.cpp

TableGen: Pack the RecordVal used flag with its type

Every record holds a copy of every field it inherits, so RecordVal makes
up most of tablegen's memory use. Store the used flag alongside the
field kind in the spare low bits of the type pointer instead of in a
separate bool. This shrinks RecordVal from 56 to 48 bytes.

Parsing AMDGPU.td with llvm-tblgen --null-backend, peak memory drops
from 934 MB to 834 MB with 10% fewer page faults.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+18-12llvm/include/llvm/TableGen/Record.h
+3-3llvm/lib/TableGen/Record.cpp
+21-152 files

LLVM/project 2ab6c33 — llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp BUFInstructions.td

AMDGPU: Promote 16-bit atomic load/store to extending i32 (#230943)

16-bit atomic loads are really extending loads into a 32-bit register,
and 16-bit atomic stores are truncating stores of a 32-bit value.
Without real true16, promote i16, f16 and bf16 atomic load and store to 
i32 as any-extending loads and truncating stores, matching how regular 
loads and stores are handled. With real true16, select all 16-bit types
directly using the type-generic atomic patterns, as is done for the
wider types.

Teach LegalizeDAG to promote ATOMIC_LOAD and ATOMIC_STORE to a 
wider integer type, preserving the extension type. The i16-only atomic
patterns are now only needed for real true16, so remove the rest.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+35-26llvm/lib/Target/AMDGPU/DSInstructions.td
+14-21llvm/lib/Target/AMDGPU/FLATInstructions.td
+28-0llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+0-13llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+2-9llvm/lib/Target/AMDGPU/BUFInstructions.td
+4-5llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+83-742 files not shown
+91-808 files

NetBSD/pkgsrc Wwl1gCU — math/minizinc Makefile

   minizinc: set GITHUB_PROJECT to fix download
VersionDeltaFile
1.2+2-1math/minizinc/Makefile
+2-11 files

LLVM/project 4b2c388 — llvm/cmake/modules AddLLVM.cmake, llvm/include/llvm-c Visibility.h

[llvm] Use a separate macro for LLVM C exports (#230090)

Previously, the LLVM C library reused the `LLVM_EXPORTS` macro to define
the `dllexport` annotation. While this caused no problem with the
resulting build, this caused warnings when building the definitions of
the LLVM C library exports.

This fixes the issue by having a separate macro, `LLVM_C_EXPORTS` for
these exports.

This has no effect outside of the Windows dylib build.

The effort to build LLVM as a dylib is tracked in #109483.
DeltaFile
+2-2llvm/lib/Support/BLAKE3/CMakeLists.txt
+4-0llvm/tools/lto/CMakeLists.txt
+3-0llvm/tools/remarks-shlib/CMakeLists.txt
+1-1llvm/include/llvm-c/Visibility.h
+1-1llvm/cmake/modules/AddLLVM.cmake
+11-45 files

FreeBSD/ports 9ef51b3 — games/vkquake Makefile distinfo, games/vkquake/files patch-Quake_common.c

games/vkquake: Update to 1.37.0

Notable changes:
+ autosaves in single-player!
+ added player speed display!
+ added ambient occlusion
+ improved performance and bugfixes

MFH:            2026Q3
Changes:        https://github.com/Novum/vkQuake/releases/tag/1.37.0
(cherry picked from commit 0c610d8eab1ce04779e3e6f2c7693f95faafdea8)
DeltaFile
+3-3games/vkquake/files/patch-Quake_common.c
+3-3games/vkquake/distinfo
+1-1games/vkquake/Makefile
+7-73 files

FreeBSD/ports 9a39292 — games/vkquake Makefile distinfo

games/vkquake: Update to 1.36.0 + take maintainer

Notable changes:
+ Support for 30th anniversary remaster
+ New level select menu
+ 5 new selectable crosshairs
+ more UI graphics filtering options
+ quake console seriously improved
+ multiplayer menu enhanced
+ lots of performance fixes, which were noticable on my laptop

PR:             298434
Approved by:    Amelia Marsh <seafork at disroot.org> (maintainer timeout)

(cherry picked from commit 058caa7c245ccafcd5105d8afad84a1a91fbafed)
DeltaFile
+3-3games/vkquake/distinfo
+2-2games/vkquake/Makefile
+5-52 files

LLVM/project 088d78c — llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine select-and-or.ll

[InstCombine] Fix profiles for SPFs in FoldSelectWithAndOrCond (#231280)

01955119c7740a5e1fdf5bed4ba4434a35fe4613 previously tried to fix the
case in FoldSelectWithAndOrCond where the select is a SPF (select
pattern flavor). However, it incorrectly propagated the profile
information, pulling it from the select passed into the function for
which the conditioon does not match the new select.

This patch fixes that by pulling the branch weights from the logical
select in the comparison if the conditions match and otherwise assigning
unknown branch weights. This should cover a decent portion of cases, and
in other cases we are unable to come up with branch weights.
DeltaFile
+12-2llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+6-5llvm/test/Transforms/InstCombine/select-and-or.ll
+18-72 files

OpenZFS/src 1a0a83b — include/sys spa.h, module/zfs vdev_mirror.c vdev_indirect.c

spa: don't self-heal while loading an older txg

A rewind (zpool import -F/-FX), an import of an explicitly requested txg
(-T) and the dry run of either load a txg older than the newest one on
disk.  Its blocks may have been freed and their space reused by later
txgs, so a copy failing its checksum is expected there.  But the mirror,
raidz and indirect read paths rewrite a failed copy with the contents of
an intact one whenever the pool is writeable, which these loads are, dry
runs included.  The write lands on whatever lives there now: blocks of
later txgs, including the newest one.  A series of
`zpool import -nFX -T` dry runs can leave the pool unimportable
("couldn't get 'config' value in MOS directory").

Only repair when no load is in progress, when the load is of the
newest txg, or once the load has committed to its txg by starting to
sync, so that resilver and rebuild repairs issued from then on, and
self-healing after the import, are unaffected.

This makes import_rewind_dryrun_no_writes pass.

    [5 lines not shown]
DeltaFile
+21-0module/zfs/spa_misc.c
+2-2module/zfs/vdev_raidz.c
+1-1module/zfs/vdev_mirror.c
+1-1module/zfs/vdev_indirect.c
+1-0include/sys/spa.h
+26-45 files

OpenZFS/src ad89e7e — tests/runfiles common.run, tests/zfs-tests/tests Makefile.am

ZTS: add import_rewind_dryrun_no_writes

A dry run of a rewind (zpool import -nFX -T <txg>) loads an older txg
with the pool writeable.  When one copy of an old block has had its
space reused by a later txg and another copy is intact, reading the
intact copy "repairs" the reused one with the old contents, overwriting
live blocks of the newest txg.

The test syncs a small pool many times, dry runs a rewind to every
older txg left in the uberblock ring, and checks that the vdev's
allocatable area is unchanged and that the pool still imports and
scrubs clean.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Will Rouesnel <wrouesnel at wrouesnel.com>
Closes #19353
DeltaFile
+108-0tests/zfs-tests/tests/functional/cli_root/zpool_import/import_rewind_dryrun_no_writes.ksh
+1-0tests/zfs-tests/tests/Makefile.am
+1-0tests/runfiles/common.run
+110-03 files

FreeNAS/freenas 304746e — src/middlewared/middlewared/alert/source syslog_ng.py, tests/api2 test_syslog_ng_alert.py

Use systemd to determine whether syslog-ng is running

(cherry picked from commit 218088c864ee4eac0bae395262e3934d610eea2f)
DeltaFile
+28-0tests/api2/test_syslog_ng_alert.py
+8-11src/middlewared/middlewared/alert/source/syslog_ng.py
+36-112 files

FreeNAS/freenas 1ab710d — src/middlewared/debian middlewared.service, tests/api2 test_syslog_ng_alert.py

Remove unnecessary `NotifyAccess=all`

(cherry picked from commit 7e3a5d79c17e932790718e11d862ac9773eee877)
DeltaFile
+0-2src/middlewared/debian/middlewared.service
+0-1tests/api2/test_syslog_ng_alert.py
+0-32 files

FreeNAS/freenas 560cede — src/middlewared/middlewared/plugins/webshare config.py, tests/api2 test_webshare_search.py

NAS-144260 / 27.0.0 / Do not allow to enable webshare search if truesearch is not available (by themylogin) (#19999)

Original PR: https://github.com/truenas/middleware/pull/19993

Co-authored-by: themylogin <themylogin at gmail.com>
DeltaFile
+32-0tests/api2/test_webshare_search.py
+4-0src/middlewared/middlewared/plugins/webshare/config.py
+36-02 files

LLVM/project fc96ecc — llvm/lib/Transforms/Vectorize LoopVectorizationLegality.cpp VPlanRecipes.cpp, llvm/test/Analysis/CostModel/AArch64 histograms.ll

LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (#127399)

This patch extends the llvm.histogram intrinsic to support additional
update operations beyond the existing add. Specifically, the new
supported operations are:

- umax: unsigned maximum

- umin: unsigned minimum

- uadd.sat: unsigned saturated addition


Changes in this patch include:

- Updates to the Loop Vectorizer (LV) to recognize and handle the new
operations.

- Scalar fallback support added via ScalarizeMaskedMemIntrin for targets
that do not natively support these operations.
DeltaFile
+126-0llvm/test/Transforms/LoopVectorize/histograms.ll
+121-0llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
+75-0llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
+36-36llvm/test/Analysis/CostModel/AArch64/histograms.ll
+46-20llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+29-15llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+433-715 files not shown
+474-8611 files

FreeNAS/freenas cb2b5ba — src/middlewared/middlewared/alert/source scrub_paused.py, src/middlewared/middlewared/plugins/pool_ scrub.py

Fix `ScrubPaused` crashing on invalid timezone comparison

(cherry picked from commit b62c299fb1ce57651385bbef667c58e2f1c68e96)
DeltaFile
+11-1tests/api2/test_zpool_scrub.py
+5-0src/middlewared/middlewared/plugins/pool_/scrub.py
+2-1src/middlewared/middlewared/alert/source/scrub_paused.py
+18-23 files

LLVM/project 01e4ee5 — llvm/lib/Target/AMDGPU GCNFeatures.td

[AMDGPU] Make xnack-support generic any feature. NFCI

This allows to include targets with and w/o xnack into a same
generic target. Generic target shall have xnack enabled in this
case.
DeltaFile
+1-1llvm/lib/Target/AMDGPU/GCNFeatures.td
+1-11 files

LLVM/project b0afb6e — llvm/include/llvm/TableGen Record.h, llvm/lib/TableGen Record.cpp

TableGen: Pack the RecordVal used flag with its type

Every record holds a copy of every field it inherits, so RecordVal makes
up most of tablegen's memory use. Store the used flag alongside the
field kind in the spare low bits of the type pointer instead of in a
separate bool. This shrinks RecordVal from 56 to 48 bytes.

Parsing AMDGPU.td with llvm-tblgen --null-backend, peak memory drops
from 934 MB to 834 MB with 10% fewer page faults.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+17-11llvm/include/llvm/TableGen/Record.h
+3-3llvm/lib/TableGen/Record.cpp
+20-142 files

FreeBSD/ports 0c610d8 — games/vkquake Makefile distinfo, games/vkquake/files patch-Quake_common.c

games/vkquake: Update to 1.37.0

Notable changes:
+ autosaves in single-player!
+ added player speed display!
+ added ambient occlusion
+ improved performance and bugfixes

MFH:            2026Q3
Changes:        https://github.com/Novum/vkQuake/releases/tag/1.37.0
DeltaFile
+3-3games/vkquake/files/patch-Quake_common.c
+3-3games/vkquake/distinfo
+1-1games/vkquake/Makefile
+7-73 files

FreeBSD/ports ea8f620 — www/freenginx Makefile, www/nginx Makefile

www/{nginx,nginx-devel,freenginx}: 3rd-party modules management

- Announce the removal of the HTTP_NOTICE option after 2026-12-31.
  nginx can return a fixed body itself.
- Announce the removal of the HTTP_UPSTREAM_STICKY option after
  2026-12-31 in nginx and nginx-devel. nginx has its own sticky
  directive since 1.29.6, freenginx does not.

Sponsored by:   Netzkommune GmbH
DeltaFile
+12-0www/nginx/Makefile
+12-0www/nginx-devel/Makefile
+6-0www/freenginx/Makefile
+30-03 files

FreeNAS/freenas d49e69c —

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files

FreeNAS/freenas ad4e8b6 — src/middlewared/middlewared/alert/source scrub_paused.py, src/middlewared/middlewared/plugins/pool_ scrub.py

NAS-144408 / 28.0.0-BETA.1 / Fix `ScrubPaused` crashing on invalid timezone comparison (#19992)
DeltaFile
+11-1tests/api2/test_zpool_scrub.py
+5-0src/middlewared/middlewared/plugins/pool_/scrub.py
+2-1src/middlewared/middlewared/alert/source/scrub_paused.py
+18-23 files