LLVM/project f276d8fllvm/lib/Frontend/OpenMP OMPIRBuilder.cpp, mlir/test/Target/LLVMIR openmp-task-depend-loc.mlir

[OMPIRBuilder] Don't leak a foreign debug loc into the taskwait call (#222586)

A kmp_depend_info array is hoisted to the entry block of the enclosing
function. Pointing the builder into that block also adopts the location
of what is already there, which belongs to whichever construct put it
there rather than to the construct being emitted. restoreIP does not put
the location back either, since it adopts the location of the
instruction it lands on, so in createTaskwait the leak outlives the
excursion and reaches the __kmpc_omp_taskwait_deps_51 call.

Use InsertPointGuard, which restores the location along with the
insertion point.

Fixes https://github.com/llvm/llvm-project/issues/222044

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+37-0mlir/test/Target/LLVMIR/openmp-task-depend-loc.mlir
+15-14llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+52-142 files

LLVM/project c45192clibcxx/include __config, libcxx/include/__locale_dir ctype_base.h locale_base_api.h

[libc++] Make _LIBCPP_PROVIDES_DEFAULT_RUNE_TABLE part of the locale base API (#219196)

Whether libc++ has to provide a rune table is really part of the
localization of a platform. Move it there instead of `<__config>`.
DeltaFile
+6-0libcxx/include/__locale_dir/support/linux.h
+0-5libcxx/include/__config
+2-1libcxx/include/__locale_dir/ctype_base.h
+3-0libcxx/include/__locale_dir/locale_base_api.h
+1-1libcxx/src/locale.cpp
+2-0libcxx/include/__locale_dir/support/windows.h
+14-76 files not shown
+26-712 files

FreeNAS/freenas 564f5a8src/middlewared/middlewared/api/v26_0_0 s3.py, src/middlewared/middlewared/etc_files/truenas_s3 buckets.conf.mako

NAS-143512 / 26.0.0 / Gate S3 auditing on appliance hardware (#19668)

This commit adds changes to decide whether the S3 service audits
requests from the hardware class rather than from the license, so it
matches the gate the kernel audit handler already uses -- both halves of
the audit trail land in the same database, so both have to answer to the
same thing. The check is renamed audit_supported since it no longer
reads a license, and the validation messages and API field descriptions
say appliance hardware instead of Enterprise license.
DeltaFile
+25-17tests/api2/test_s3_config.py
+19-8src/middlewared/middlewared/plugins/truenas_s3/config.py
+5-3src/middlewared/middlewared/plugins/truenas_s3/bucket_crud.py
+2-2src/middlewared/middlewared/etc_files/truenas_s3/buckets.conf.mako
+2-2src/middlewared/middlewared/api/v26_0_0/s3.py
+53-325 files

FreeNAS/freenas 2c96890

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files

FreeNAS/freenas 5644df5src/middlewared/middlewared/api/v26_0_0 s3.py, src/middlewared/middlewared/api/v27_0_0 s3.py

NAS-143512 / 27.0.0-BETA.1 / Gate S3 auditing on appliance hardware (#19668)

This commit adds changes to decide whether the S3 service audits
requests from the hardware class rather than from the license, so it
matches the gate the kernel audit handler already uses -- both halves of
the audit trail land in the same database, so both have to answer to the
same thing. The check is renamed audit_supported since it no longer
reads a license, and the validation messages and API field descriptions
say appliance hardware instead of Enterprise license.
DeltaFile
+25-17tests/api2/test_s3_config.py
+19-8src/middlewared/middlewared/plugins/truenas_s3/config.py
+5-3src/middlewared/middlewared/plugins/truenas_s3/bucket_crud.py
+2-2src/middlewared/middlewared/etc_files/truenas_s3/buckets.conf.mako
+2-2src/middlewared/middlewared/api/v27_0_0/s3.py
+2-2src/middlewared/middlewared/api/v26_0_0/s3.py
+55-346 files

LLVM/project c8655a8lldb/unittests/Utility RegisterValueTest.cpp

[lldb][test] Fix RegisterValueTest.cpp compile with GCC (#222889)

Avoid some most vexing parse problems.

Fixes #220707 / 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4.
DeltaFile
+8-5lldb/unittests/Utility/RegisterValueTest.cpp
+8-51 files

LLVM/project e3ba4c8llvm/include/llvm/CodeGen FunctionLoweringInfo.h, llvm/lib/CodeGen/SelectionDAG StatepointLowering.cpp

DAG: Materialize a directly-lowered gc.relocate in its own block

Fixes machine verifier errors with -early-live-intervals.

A NoRelocate statepoint value is a directly-lowered leaf value. When its
gc.relocate is in another block, it was made available by exporting it from the
statepoint's block. For an invoke this defines the vreg after the call, which
does not dominate the use reached along the unwind edge, giving an invalid live
range (or a silent read of an undefined register without -verify-machineinstrs).

Since the leaf has no chain or operands, rematerialize it at the gc.relocate
instead of exporting it. undef already rematerializes there. A gc.relocate
value is always a pointer, so only the integer-constant and frame-index leaves
are handled.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+89-0llvm/test/CodeGen/X86/statepoint-relocate-eh.ll
+46-6llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+25-0llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
+160-63 files

LLVM/project 764a4f4bolt/lib/Passes MCF.cpp, bolt/test/AArch64 edge-weight-estimation-fixes.s

[BOLT] Fixed BOLT edge weight estimation in non-LBR mode. (#222538)

Before: When estimating edge weights within `computeEdgeWeights` in
`MCF.cpp`, if the `TotalChildrenCount` is 0, the default edge weight is
`1 / (GraphT::child_end(BB)_ - GraphT::child_begin(BB))` resulting in
integer division and incorrect distribution of estimated edge weights.

After: Correctly estimate edge weights with zero and non-zero values of
`TotalChildrenCount` by enforcing floating point division.

---------

Co-authored-by: Thrrreeee <shijinrui at bytedance.com>
DeltaFile
+61-0bolt/test/AArch64/edge-weight-estimation-fixes.s
+1-1bolt/lib/Passes/MCF.cpp
+62-12 files

OPNSense/src fae555asys/net if_media.h

net: Add ifmedia support for 10GBase-BX BiDi

10GBase-BX uses paired wavelengths to carry both directions over a
single strand of single-mode fiber.  The optics must be paired so that
the transmit and receive wavelengths cross over.

(cherry picked from commit 4220b52453c9701922955dcc1c1e1554d6a9f3ae)
DeltaFile
+3-0sys/net/if_media.h
+3-01 files

LLVM/project 884f70eorc-rt/include/orc-rt-c/support Error.h WrapperFunction.h

[orc-rt] Fix C++ comments in C header. NFC. (#222887)
DeltaFile
+4-2orc-rt/include/orc-rt-c/support/WrapperFunction.h
+1-1orc-rt/include/orc-rt-c/support/Error.h
+5-32 files

LLVM/project 5d6c716llvm/test/Transforms/LoopVectorize outer_loop_contiguous.ll vplan-widen-select-instruction.ll, llvm/test/Transforms/LoopVectorize/AArch64 scalable-avoid-scalarization.ll outer_loop_prefer_scalable.ll

[VPlan] Narrow VPWidenGEPRecipe if only its first lane is used. (#221171)

Extend existing narrowing in legalizeAndOptimizeInductions, already
applied to VPReplicateRecipe and VPWidenRecipe, to VPWidenGEPRecipe as
well. This improves cases where an interleaved access's insert position
shares an address calculation with a strided access (see
RISCV/interleaved-load-masked-store.ll), which previously caused the
legacy cost model to classify the address as non-uniform.
DeltaFile
+61-0llvm/test/Transforms/LoopVectorize/RISCV/interleaved-load-masked-store.ll
+7-18llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+4-12llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
+4-8llvm/test/Transforms/LoopVectorize/outer_loop_contiguous.ll
+1-10llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
+2-9llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
+79-5712 files not shown
+100-11118 files

FreeBSD/ports 3c3762bnet/ntpsec Makefile distinfo

net/ntpsec: update 1_2_4 → 1.2.5
DeltaFile
+3-3net/ntpsec/distinfo
+1-1net/ntpsec/Makefile
+4-42 files

FreeBSD/ports 2994427textproc/yq Makefile distinfo

textproc/yq: update 4.1.1 → 4.1.2
DeltaFile
+3-3textproc/yq/distinfo
+2-2textproc/yq/Makefile
+5-52 files

FreeBSD/ports 8764617graphics/aseprite Makefile distinfo

graphics/aseprite: update       1.3.18.3 → 1.3.18.5
DeltaFile
+3-61graphics/aseprite/distinfo
+5-38graphics/aseprite/Makefile
+8-992 files

FreeBSD/ports edd2005net/zapret2 Makefile distinfo

net/zapret2: update 1.0.4 → 1.0.5.1
DeltaFile
+3-3net/zapret2/distinfo
+1-1net/zapret2/Makefile
+4-42 files

FreeBSD/ports 8265f2ewww/restinio Makefile distinfo

www/restinio: update 0.7.9.1 → 0.7.10
DeltaFile
+3-3www/restinio/distinfo
+2-3www/restinio/Makefile
+5-62 files

LLVM/project f214b9allvm/test/CodeGen/AMDGPU amdgcn.bitcast.832bit.ll amdgcn.bitcast.896bit.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fpow.ll

Merge branch 'main' into users/jmmartinez/nfs_headache
DeltaFile
+57,327-55,762llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+6,634-6,608llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,576-5,657llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+4,486-4,550llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+2,884-2,534llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+4,053-1,008llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
+80,960-76,1192,163 files not shown
+167,456-119,7162,169 files

OPNSense/src 69461c0sys/net iflib.c

iflib: Remove an unused field from struct iflib_rxq

Reported by:    Alexander Sideropoulos <Alexander.Sideropoulos at netapp.com>
MFC after:      1 week

(cherry picked from commit fc09c7fee23b3cf3ddc95105ef6ef41d7956232f)
DeltaFile
+0-1sys/net/iflib.c
+0-11 files

LLVM/project dc68250llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 operand-chains-max-reg-vf.ll

[SLP] Limit second pass to register VF in vectorizeNonVectorizableInsts. (#222755)

The second tryToVectorizeList pass in vectorizeNonVectorizableInsts
would try all roots for each possible VF between 1 and the number of
entries in the list.

This can cause super-linear compile-time, for example when there are
basic blocks with calls taking a large number of loads as arguments.

For example, running SLPVectorizer on a block with 1024 loads passed to
calls (https://llvm.godbolt.org/z/8M53G6WzW) will take a large amount of
time (timeout on godbolt, locally on Apple M1 it takes ~30s). With the
fix, it only takes 0.01s.

On large IR corpus, I did not see any difference in vectorization
decisions on AArch64.

PR: https://github.com/llvm/llvm-project/pull/222755
DeltaFile
+335-0llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
+6-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+341-12 files

OPNSense/src 3fbc6dasys/net iflib.c

iflib: Permit SR-IOV configuration on a down interface

Drivers which remap PF queues need a stop/mutate/restart transaction
only when the interface has live queues. Permit their IOV
initialization callback while the interface is administratively down
and leave it down afterward.

This restores the standard boot-time iovctl.conf workflow and
lets other opt-in drivers configure VFs before netif brings the PF up.

(cherry picked from commit 2cf580c694f6f392531a63f01c3fb89c0244f89a)
DeltaFile
+31-0sys/net/iflib.c
+31-01 files

LLVM/project 462dbc5llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen Passes.h ResetMachineFunctionPass.h

[CodeGen][NPM] Port ResetMachineFunction to NPM
DeltaFile
+76-63llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
+36-0llvm/include/llvm/CodeGen/ResetMachineFunctionPass.h
+2-1llvm/include/llvm/CodeGen/Passes.h
+1-1llvm/lib/CodeGen/TargetPassConfig.cpp
+1-1llvm/include/llvm/Passes/MachinePassRegistry.def
+1-1llvm/include/llvm/InitializePasses.h
+117-672 files not shown
+119-678 files

OPNSense/src d9f8185sys/net iflib.h iflib.c

iflib: Add restart transactions for IOV reconfiguration

Some devices remap the PF queues when entering or leaving SR-IOV. Add
opt-in PCI IOV helpers that hold the iflib context lock across the
complete stop, driver callback, and restart transaction.

Existing drivers continue to use the non-restarting helpers.

Sponsored by:   BBOX.io

(cherry picked from commit f8fa2d77bc305bec519f9f02afe211e903c57573)
DeltaFile
+22-0sys/net/iflib.c
+2-0sys/net/iflib.h
+24-02 files

LLVM/project d63f522flang/lib/Optimizer/Transforms LoopInvariantCodeMotion.cpp, flang/test/Transforms licm.fir

[flang] Do not hoist fir.field_index out of loops

Lowering a consumer of a !fir.field value inspects its defining operation:
for a record whose layout is known at compile time the field becomes an LLVM
GEP struct index, which must be a constant, and otherwise the `field`
attribute is read off the defining op. A field value therefore may not be a
block argument.

LICM broke that. fir.field_index is Pure and takes no operands, so it is
trivially loop-invariant and was hoisted out of the loop. Lowering emits one
inside each arm of a construct -- for example the CASEs of a SELECT CASE that
each pass a different component of the same derived type as an actual
argument -- so hoisting them left those arms as otherwise-identical blocks
differing only in that operand. Block merging then merged them and threaded
the field through a new block argument, and codegen aborted with "must be a
constant".

Leave producers of a !fir.field where they are. The arms then differ by an
operation rather than by an operand, so they are no longer merge candidates.

    [7 lines not shown]
DeltaFile
+15-0flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
+10-2flang/test/Transforms/licm.fir
+25-22 files

OPNSense/src 9ea9fbfsys/net iflib.c

iflib: Initialize the VFLR task unconditionally

The VFLR task was initialized only from drivers MSI-X interrupt
assignment paths.  ixl's legacy interrupt handler can nevertheless defer
VFLR work, leaving an uninitialized task.  Even with MSI-X, the admin
interrupt was established before the task was initialized.

Initialize it alongside the other private tasks.  The existing detach
check and private-taskqueue drains then cover its lifecycle for every
interrupt mode and registration failure.

Sponsored by:   BBOX.io

(cherry picked from commit b4208a67edc2eb7898a9ff2a6f3990c6852910e4)
DeltaFile
+1-1sys/net/iflib.c
+1-11 files

OPNSense/src 52a2571share/man/man4 iflib.4, sys/net iflib.c

iflib: Add an admin task detach fail point

Add an exact-device fail point immediately after the admin task checks
IFC_IN_DETACH. This makes the detach race reproducible without affecting
another interface.

Use a bounded delay to keep the task active while detach enters the
taskqueue drain.  Mark the point nonsleepable as a safety backstop, and
document a one-shot test for verifying that deregistration drains an
already-running task before ether_ifdetach().

Reviewed by:    gallatin, kgalazka
Sponsored by:   BBOX.io
Differential Revision:  https://reviews.freebsd.org/D58720

(cherry picked from commit ac56d36007a5a1a01fe69df370f272060e852e0b)
DeltaFile
+19-0share/man/man4/iflib.4
+11-0sys/net/iflib.c
+30-02 files

OPNSense/src 9ab0500sys/net iflib.c

iflib: Drain configuration tasks before interface detach

iflib_device_deregister() sets IFC_IN_DETACH before removing the
interface, but a task which already passed its detach check can still
report a link change.  This can re-arm if_linktask after
ether_ifdetach() has drained it and leave work pending across queue
teardown.

Drain the entire private taskqueue before ether_ifdetach().  Drivers
may register their own link-related configuration tasks there, so
draining only the framework admin task leaves the same race for those
drivers.

Differential Revision:  https://reviews.freebsd.org/D58452

Co-authored-by: Andrew Gallatin <gallatin at FreeBSD.org>
Co-authored-by: Kevin Bowling <kbowling at FreeBSD.org>
(cherry picked from commit ba353c8950d575f9d15b82c92658e660935fba25)
DeltaFile
+7-0sys/net/iflib.c
+7-01 files

OPNSense/src 10cf6e5share/man/man4 iflib.4, sys/net iflib.c

iflib: Add registration failure injection points

Add six device-scoped fail(9) points at the registration milestones
needed to exercise each unwind path. An exact, runtime-only device
selector prevents unrelated iflib devices from consuming an armed point.

Mark the points non-sleepable because registration holds the ifnet and
context locks. Document one-shot operation and bus-address reprobe so a
failed attach can be recovered without another kernel build.

Reviewed by:    gallatin
Sponsored by:   BBOX.io
Differential Revision:  https://reviews.freebsd.org/D58722

(cherry picked from commit 90e7dbe5e2ca47baff4e4c6d9e892a0554eec4db)
DeltaFile
+46-0sys/net/iflib.c
+40-0share/man/man4/iflib.4
+86-02 files

LLVM/project eb6fe5allvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 neon-addsub-long-reassoc.ll

[AArch64] Reassociate adds/subs of extends for [SU](ADD|SUB)L. (#222561)

We do this for expressions that can't use widening add/sub.
DeltaFile
+239-0llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
+52-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+291-02 files

OPNSense/src 03842ccsys/net iflib.c ifdi_if.m

iflib: Allow conditional LED device support

A driver class may implement LED control even though the capability is
not available on every device or firmware version it supports.  Add an
optional capability method and consult it before creating the led(4)
device.  Default to supported so existing providers are unchanged.

This will be used by bnxt which blends PF and VF in the same driver.

(cherry picked from commit 2519e19f05e0c3e5925bf81b729b4c28f2ad1af6)
DeltaFile
+10-0sys/net/ifdi_if.m
+1-1sys/net/iflib.c
+11-12 files

OPNSense/src 5f7f556sys/net iflib.c

iflib: Create led(4) devices

When a driver implements ifdi_led_func, have the framework create its
led(4) device after attach completes and the ifnet and context locks are
released.

PR:             246885
Reported by:    jlduran
Reviewed by:    markj
Differential Revision:  https://reviews.freebsd.org/D32389

(cherry picked from commit 6591a7f6919295f2ec2b463d1ae9554a8bbf6104)
DeltaFile
+7-0sys/net/iflib.c
+7-01 files