LLVM/project ab35099lld/docs WebAssembly.md index.md, lld/docs/ELF linker_script.md warn_backrefs.md

[docs] Rewrite LLD docs to Markdown (#209897)

Tracking issue: #201242
This is a stacked PR based on #209894 , which will be a standalone
commit that renames *.rst -> *.md before this PR lands for history
preservation purposes. See the [migration guide] for more information.

[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines

This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good.
DeltaFile
+153-166lld/docs/WebAssembly.md
+122-135lld/docs/ELF/linker_script.md
+50-64lld/docs/index.md
+54-53lld/docs/ELF/warn_backrefs.md
+45-51lld/docs/windows_support.md
+44-52lld/docs/NewLLD.md
+468-5219 files not shown
+716-76015 files

LLVM/project fb9362aclang/include/clang/Sema TemplateInstCallback.h, clang/lib/Frontend FrontendActions.cpp

[clang] remove templight support

Removed as unmaintained, per discussions in https://discourse.llvm.org/t/rfc-removing-templight-support/90777
DeltaFile
+0-345clang/test/Templight/templight-empty-entries-fix.cpp
+0-262clang/lib/Frontend/FrontendActions.cpp
+0-174clang/test/Templight/templight-nested-memoization.cpp
+0-85clang/test/Templight/templight-prior-template-arg.cpp
+0-84clang/test/Templight/templight-nested-template-instantiation.cpp
+0-82clang/include/clang/Sema/TemplateInstCallback.h
+0-1,03221 files not shown
+4-1,55127 files

LLVM/project 723414dlibunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+198-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,709-6134 files not shown
+2,037-6940 files

LLVM/project bf58bb3libunwind/test ra_sign_state.pass.cpp, llvm/lib/Target/AArch64 AArch64PointerAuth.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+848-35llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+198-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+48-24llvm/test/CodeGen/AArch64/pauth-lr-tail-call-fpdiff.ll
+1,747-11938 files not shown
+2,176-17544 files

LLVM/project f184554libunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+164-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,675-6128 files not shown
+1,950-6834 files

LLVM/project 68d4221libunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+198-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,709-6134 files not shown
+2,037-6940 files

LLVM/project ec3069blibunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+84-59llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+262-644 files

LLVM/project f5cbb45libunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+164-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,675-6128 files not shown
+1,950-6834 files

LLVM/project 101fffalibunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+178-53 files

LLVM/project 89bc929libunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+84-59llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+262-644 files

LLVM/project 288543dlibunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+178-53 files

LLVM/project f8107f6clang/lib/Sema HLSLExternalSemaSource.cpp, clang/test/AST/HLSL Textures-AST.hlsl

[HLSL] Implement RWTexture2DArray (#208725)

Add front-end support for RWTexture2DArray, and update related tests to
include coverage of this resource.

Fixes #194947

---------

Co-authored-by: Tim Corringham <tcorring at amd.com>
DeltaFile
+20-0clang/lib/Sema/HLSLExternalSemaSource.cpp
+4-0clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+3-1clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
+1-0clang/test/AST/HLSL/Textures-AST.hlsl
+1-0clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
+1-0clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
+30-12 files not shown
+32-18 files

LLVM/project c9a9737lld/docs NewLLD.md NewLLD.rst, lld/docs/ELF linker_script.md linker_script.rst

[docs] Rename LLD docs to Markdown (#209894)

Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840

This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
DeltaFile
+317-0lld/docs/NewLLD.md
+0-317lld/docs/NewLLD.rst
+268-0lld/docs/ELF/linker_script.md
+0-268lld/docs/ELF/linker_script.rst
+0-264lld/docs/WebAssembly.rst
+264-0lld/docs/WebAssembly.md
+849-84922 files not shown
+1,695-1,69528 files

LLVM/project 5b46dcfllvm/include/llvm/DWP DWP.h, llvm/lib/DWP DWP.cpp

[llvm-dwp] Fix endianness issues (#203424)

llvm-dwp fails on SystemZ, which is big-endian, as follows:

    $ cat min.c
    int main() {}
    $ clang -g -O0 -gsplit-dwarf min.c -o min
    $ llvm-dwp -e min -o min.dwp
error: compile unit exceeds .debug_info section range: 905969668 >= 58

This is because it hardcodes IsLittleEndian=true in multiple places. Fix
by forwarding endianness of the current object file.

Add a SystemZ-specific test.

Add proper big-endian support to X86/compress.test and add an
explanation regarding what the hardcoded blobs are and how they are
generated.
DeltaFile
+206-0llvm/test/tools/llvm-dwp/SystemZ/big_endian_info_v5.s
+71-7llvm/test/tools/llvm-dwp/X86/compress.test
+39-25llvm/lib/DWP/DWP.cpp
+13-4llvm/include/llvm/DWP/DWP.h
+329-364 files

LLVM/project b74a97clldb/source/Expression DWARFExpression.cpp, lldb/unittests/Expression DWARFExpressionTest.cpp

[lldb] Produce generic results for DWARF relational operations (#210122)

DWARF relational operations produce a generic result, whose width is the
target address size. LLDB currently assigns the C++ `bool` comparison
result directly to `Scalar`; because `Scalar` has no `bool` constructor,
this creates a 32-bit integer even on 64-bit targets.

The stricter binary operand checks added in #201288 exposed this in
x86-64 `_sigtramp` CFI. A later `DW_OP_plus` combines a 64-bit generic
address with the 32-bit relational result, so evaluation fails and
signal-frame unwinding stops. The generic-operand relaxation in #209641
does not cover this case because the relational result is narrower than
the address size.

Convert the results of `DW_OP_eq`, `DW_OP_ge`, `DW_OP_gt`, `DW_OP_le`,
`DW_OP_lt`, and `DW_OP_ne` through the existing `to_generic` helper.

## Testing

Add a unit test that evaluates each relational opcode with an 8-byte
address size and then consumes its result with `DW_OP_plus`.
DeltaFile
+33-0lldb/unittests/Expression/DWARFExpressionTest.cpp
+12-6lldb/source/Expression/DWARFExpression.cpp
+45-62 files

LLVM/project 44e3f3cclang/lib/CIR/CodeGen CIRGenExprScalar.cpp, clang/test/CIR/CodeGen ternary-throw.cpp

[CIR] Fix use-after-free when emitting ternary with a throw-expression arm (#208850)

Fixes #208848.

When a conditional operator arm is a noreturn expression, such as
`throw`, `VisitAbstractConditionalOperator` saved an insertion point in
the empty dead-code block created after the expression. The intent was
to insert a `cir.yield` later, once the types of both arms were known.
However, `LexicalScope::cleanup()` removes that empty block when the
arm’s scope exits, leaving the deferred insertion point with a dangling
block pointer.

Avoid saving the insertion point for noreturn arms. These regions
already terminate with `cir.unreachable` and do not require a
`cir.yield`. The CIR verifier accepts ternary regions that terminate
with `cir.unreachable`.

Extended `ternary-throw.cpp` with scalar-rvalue cases covering `throw`
in either arm and in both arms. The existing tests only covered glvalue
conditionals, which take the LValue emission path and never reach this
code.
DeltaFile
+89-0clang/test/CIR/CodeGen/ternary-throw.cpp
+21-37clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+110-372 files

LLVM/project d9d1d91offload/plugins-nextgen/level_zero/src L0Plugin.cpp

[OFFLOAD][L0] Don't return error on initImpl if library/drivers are missing (#210083)

When a Level Zero driver is not present in the environment the current
behavior makes olInit fail if the level_zero plugin is requested. This
changes the behavior to match other plugins where it doesn't fail but
return 0 supported devices.
DeltaFile
+14-2offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
+14-21 files

LLVM/project c6d8967llvm/lib/Target/AMDGPU SOPInstructions.td, llvm/test/CodeGen/AMDGPU uaddsat.ll

[AMDGPU] Lower uniform uaddsat to SALU instructions

Map uniform uaddsat.i16(i16 a, i16 b) to the following:

```
s_and_b32 s2, s0, 0xffff    ; s0 = i16 a
s_and_b32 s3, s1, 0xffff    ; s1 = i16 b
s_add_i32 s4, s3, s2
s_min_u32 s5, s4, 0xffff
```
DeltaFile
+130-90llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
+56-0llvm/test/CodeGen/AMDGPU/uaddsat.ll
+6-0llvm/lib/Target/AMDGPU/SOPInstructions.td
+192-903 files

FreeBSD/ports 928f285net/proxychains Makefile pkg-plist, net/proxychains/files patch-proxychains_core.h patch-proxychains-libproxychains.c

net/proxychains: Remove expired port

2026-07-16 net/proxychains: Use net/proxychains-ng instead
DeltaFile
+0-38net/proxychains/Makefile
+0-36net/proxychains/files/patch-proxychains_core.h
+0-22net/proxychains/files/patch-proxychains-libproxychains.c
+0-16net/proxychains/files/patch-proxychains_core.c
+0-7net/proxychains/pkg-plist
+0-3net/proxychains/pkg-descr
+0-1223 files not shown
+1-1259 files

LLVM/project a11e372llvm/lib/Target/RISCV RISCVISelLowering.cpp

[RISCV][P-ext] Remove redundant shuffle lowering for packed widening high-half convert. (#210128)

The more general lowerVECTOR_SHUFFLEAsPZip can handle this case.
DeltaFile
+0-43llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+0-431 files

FreeBSD/ports 5bd4d08devel/electron40 Makefile

devel/electron40: Deprecate and set to expire on 2026-08-30
DeltaFile
+4-0devel/electron40/Makefile
+4-01 files

FreeBSD/ports 467b2bfdevel/electron43 Makefile distinfo, devel/electron43/files patch-chrome_browser_about__flags.cc patch-sandbox_policy_openbsd_sandbox__openbsd.cc

devel/electron43: Add port: Build cross-platform desktop apps with JavaScript, HTML, and CSS

Build cross platform desktop apps with JavaScript, HTML, and CSS.

It's easier than you think.

If you can build a website, you can build a desktop app. Electron is a
framework for creating native applications with web technologies like
JavaScript, HTML, and CSS. It takes care of the hard parts so you can
focus on the core of your application.

WWW: https://electronjs.org/
DeltaFile
+12,174-0devel/electron43/files/packagejsons/yarn.lock
+945-0devel/electron43/files/packagejsons/.yarn/releases/yarn-4.12.0.cjs
+509-0devel/electron43/files/patch-chrome_browser_about__flags.cc
+490-0devel/electron43/Makefile
+448-0devel/electron43/files/patch-sandbox_policy_openbsd_sandbox__openbsd.cc
+435-0devel/electron43/distinfo
+15,001-01,786 files not shown
+60,176-11,792 files

LLVM/project 1387002clang/include/clang/Basic DiagnosticParseKinds.td, clang/lib/Parse ParseExprCXX.cpp ParseStmt.cpp

[Clang][NFC] Update diagnostic handling for C2y compatibility in parser (#209920)

Follow-up on #198244 after #209241
DeltaFile
+3-6clang/include/clang/Basic/DiagnosticParseKinds.td
+1-3clang/lib/Parse/ParseExprCXX.cpp
+1-3clang/lib/Parse/ParseStmt.cpp
+5-123 files

LLVM/project 152fdb8mlir/lib/Dialect/OpenACC/Transforms ACCCGToGPU.cpp

[OpenACC] emit NYI for multi-rank or non-memref type array reduction (#210143)

This should be an NYI and not an assertion
DeltaFile
+4-2mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+4-21 files

LLVM/project e78a880llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV][P-ext] Make undef vectors Legal. (#210106)

Add a few additional isel patterns to avoid false dependencies. We may
want to enable the BreakFalseDep pass in the future.
DeltaFile
+21-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+14-0llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+12-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+2-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+49-04 files

LLVM/project fd3bcd4libunwind/test aix_vapi_signal_unwind.pass.cpp

Replace comma with semicolon

Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
DeltaFile
+2-2libunwind/test/aix_vapi_signal_unwind.pass.cpp
+2-21 files

LLVM/project 85cc996llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 mul-shl-nsw-intmin.ll

[SLP]Drop nsw when shl by BW-1 is converted to mul

shl nsw X, BW-1 is valid at X = -1, but mul X, INT_MIN is not nsw-safe
there. Drop nsw on the vector mul when a shl lane with shift amount
BW-1 is unified into mul during opcode interchange.

Fixes #210093

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/210152
DeltaFile
+12-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-1llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
+13-12 files

LLVM/project 8116ab2llvm/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/test/Transforms/InstCombine sincos.ll

[InstCombine] Use getInsertionPointAfterDef to get sin/cos InsertPt. (#210130)

The current logic added in
https://github.com/llvm/llvm-project/pull/194616
picks an incorrect insert point for the argument is an invoke.

Use getInsertionPointAfterDef and bail out if there is no such insert
point.

Fixes crashes in the added tests.

Fixes https://github.com/llvm/llvm-project/issues/210111
DeltaFile
+47-0llvm/test/Transforms/InstCombine/sincos.ll
+5-7llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+52-72 files

NetBSD/pkgsrc na1gn4pdevel/py-codespell Makefile

   py-codespell: add some test dependencies
VersionDeltaFile
1.21+4-3devel/py-codespell/Makefile
+4-31 files

LLVM/project 909ba8dllvm/lib/Target/AMDGPU SIFoldOperands.cpp AMDGPU.td, llvm/test/CodeGen/AMDGPU bf16-math.ll

[AMDGPU] Select upper 16-bits for inline constants in packed BF16 (#209861)

From gfx1250 software programming guide, v_pk_*_bf16 instructions using
inline constants must use OPSEL to select the upper 16-bits.

Fixes: LCOMPILER-2445
DeltaFile
+8-8llvm/test/CodeGen/AMDGPU/bf16-math.ll
+7-0llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+6-0llvm/lib/Target/AMDGPU/AMDGPU.td
+21-83 files